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Wafer/Panel Level Fine Pitch Substrate Inspection/Metrology, Phase 3

2022 Project Leadership Award


Congratulations to the Wafer/Panel Level Fine Pitch Substrate Inspection/Metrology, Phase 3 project team for receiving a 2022 INEMI Project Leadership Award. These awards recognize projects that have demonstrated superior performance of electronics manufacturing practices, provided solutions that enable significant technology and business results and/or had a positive impact on the electronics manufacturing value chain and its ecosystem. The project team members are:

  • Billy Chung-Yu Cheng, Unimicron
  • Jing-Sian Huang, Unimicron
  • Alison Yu-Ting Lin, Unimicron
  • Glenn Pomerantz, IBM
  • Charles Reynolds, IBM
  • Anna Lucy Santos, AT&S
  • Neil Tang, AT&S
  • Tom Wassick, IBM
  • Feng Xue, IBM
  • Channing Cheng-Lin Yang, Unimicron
  • Zhihua Zou, Intel

 

End-of-Project Webinar


End-of-Project Webinar: Wafer/Panel Level Fine Pitch Substrate Inspection/Metrology Project, Phase 3, August 26 & 27, 2021 (members only)
 

Statement of Work and Project Statement 

Statement of Work 
Project Statement 

 

Background

The finer pitch substrate features used in new advanced packaging technologies such as SiP, 2.5D, etc., can make it difficult to validate designs and, as a result, impact yield assessment and quality validation of these new packages. There is a need to identify and characterize the capabilities of inspection technologies that can enable faster process development and higher yield in volume production. The Wafer/Panel Level Fine Pitch Substrate Inspection/Metrology project was organized to address this need.

Phase 3 Focus

Phase 3 continues the study of inspection technologies begun in Phase 2, focusing on an organic test vehicle (TV).

Objective

Evaluate current inspection & measurement capabilities for fine pitch substrates that will be needed over the next five years.

Strategy/Approach

  • Fabricate TV on organic substrate with the same TV designs used in Phase 2.
  • Understand and quantify the automatic optical inspection (AOI) capability limitations for the fine pitch patterns and defects on TVs.
  • Compare with other metrologies, such as SEM or OGP, and identify the different capability results among the TV substrates.
  • Start the review of TV designs and defect modes for 10um line/space down to 1um and determine implications for organic substrate fabrication. 
  • Over the longer term, analyze measurement data and compare the data with AOI-type equipment and other metrologies and TV substrate types. 

 

Presentations

"Organic Panel Fine Pitch Circuit Pattern Inspection and Metrology Readiness," Feng Xue (IBM Singapore), EPTC, December 1-31 (virtual event) (members only)
End-of-Project Webinar: Wafer/Panel Level Fine Pitch Substrate Inspection/Metrology Project, Phase 3, August 26 & 27, 2021 (members only)
Wafer/Panel Level Fine Pitch Substrate Inspection/Metrology Project, Phase 3 Call-for-Participation Webinar (March 5, 2020)

 

Contact

Masahiro Tsuriya
[email protected]

Project Leaders


Feng Xue, IBM

Joe Zou, Intel

Charlie Reynolds, IBM
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